I ported CP/M80 to SORD M68. the Z80SIO I/O address and FDC(MB8877A) read/write processing code also worked so I can write BIOS. The following is a memo description of the problems I had.
Blocking/de-blocking process
The CP/M80 sets the capacity of one sector at 128 bytes, but the SORD M68 double-density recording is 256 bytes/sector, so a process called blocking/deblocking is required.
The number of bytes per sector was already a problem in CP/M2.2, and there is an official conversion code (axg.asm). However, this code is written in 8080 style and cannot be assembled with my ZASM.EXE, so I use a converter named TOZ.EXE to convert it. The macro will not work, but it is easy because it only calculates secshf=log2(hstblk). In this case it will be 1. Now that we can assemble it, all we need to do is write the readhst and writehst routines.
For example, the readhst subroutine is processed as follows. First, set the track number set by CP/M as the target track in the track register and execute the SEEK command. Then, simply set the target sector number to the sector register and execute the READ command. This READ command should be a DMA-based command; I have written about DMA and the READ command in a previous blog.
The writehst subroutine is the same as the readhst subroutine, just with a different command number.
SIDE 0 and 1 processing
In CP/M80, there is no special process for double-sided recording; CP/M does not distinguish sides, so logically they are all considered the same side, and only the number of tracks increases. Therefore, logical and physical tracks have the following relationship.
Logical track Physical track Side
2 2 0
3 2 1
4 3 0
5 3 1
6 4 0
7 4 1
Therefore, the number of logical tracks is shifted one bit to the right and +1 is the physical track. If the carry flag is up in this operation, we know that the logical track was odd, and we can write code to specify that side 1 should be read/write.
Apart from this, there was another problem, possibly a SORD M68 CP/M68K formatting issue, where sectors were shifted by 1. I solved this by adding a +1 instruction to the sector register setting code in the writehst and readhst subroutines.
